NONE 20260406095823699 wseas/wseas content-registration-form+ja@crossref.org content-registration-form WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS 1109-2734 2224-266X S. Rooban Department of Electronics and Communication Engineering, Koneru Lakshmaiah Education Foundation, INDIA Arshad Bash AS Department of Electronics and Communication Engineering, Koneru Lakshmaiah Education Foundation, INDIA Sharath Babu Nunavathu Department of Electronics and Communication Engineering, School of Engineering, Anurag University, INDIA G. Sreenivasa Raju Department of Electronics and Communication Engineering, School of Engineering, Anurag University, INDIA M. Kiran Kumar Department of Electronics and Communication Engineering, School of Engineering, Anurag University, INDIA Amrita Sajja Department of Electronics and Communication Engineering, School of Engineering, Anurag University, INDIA Approximate Circuits are circuits that can tolerate known errors. The error tolerance is a tradeoff for achieving low power consumption, low area and increased speed of circuits. This unique quality of approximate circuits makes a huge impact on circuit design and is highly in demand in sectors like image processing, signal processing, etc. Due to this, performing verification for these circuits has become an essential part. However, formal verification techniques like formal error metrics, Mean Squared Error (MSE), Mean Absolute Error (MAE), and Maximum Error (MXE) cannot be used to prove 100% accuracy of approximate circuits due to error tolerant nature. Thus, in this work, we propose a formal verification methodology to generate a 100% verification assurance of these approximate techniques and reduce the verification time by 0.01 sec. Approximated Ripple Carry Adder (RCA) has been used as a case study and has performed verification for (28)2 input patterns and has proved for all input patterns that the approximate circuit stands true for the desired functional specifications. A Formal Verification technique called Bounded Model Checking (BMC) is used to perform the verification using Symbiyosys formal verification tool. 04 06 2026 04 06 2026 25 3 https://creativecommons.org/licenses/by/4.0/deed.en_US 10.37394/23201.2026.25.3 https://wseas.com/journals/cas/2026/a065101-850.pdf A. M. Dalloo, A. Jaleel Humaidi, A. K. Al Mhdawi and H. Al-Raweshidy, ”Approximate Computing: Concepts, Architectures, Challenges, Applications, and Future Directions,” in IEEE Access, vol. 12, pp. 146022-146088, 2024. 10.1109/ACCESS.2024.3467375 A. Bosio, A. Virazel, P. Girard and M. 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