Antonio Carlos Fernandes Da Silva, Bruno De Abreu Silva, Joelmir Jose Lopes, Jorge Luiz E Silva, "The ChipCflow Project to Accelerate Algorithms using a Dataflow Graph in a Reconfigurable System," WSEAS Transactions on Computers, vol. 11, pp. -, 2012, DOI:
Antonio Carlos Fernandes Da Silva, Bruno De Abreu Silva, Joelmir Jose Lopes, Jorge Luiz E Silva. The ChipCflow Project to Accelerate Algorithms using a Dataflow Graph in a Reconfigurable System.
WSEAS Transactions on Computers. 2012;11:-.
WSEAS Transactions on Computers
Print ISSN: 1109-2750, E-ISSN: 2224-2872
Volume 11, 2012
The ChipCflow Project to Accelerate Algorithms using a Dataflow Graph in a Reconfigurable System
Authors: , , ,
Abstract: In this paper, the ChipCflow Project to accelerate algorithms using a design of a field programmable gate array (FPGA) as a prototype of a static dataflow architecture is presented. The static dataflow architecture using operators interconnected by parallel buses was implemented. Accelerating algorithms using a dataflow graph in a reconfigurable system shows the potential for high computation rates. The results of benchmarks implemented using the static dataflow architecture are reported at the end of this paper.
Keywords:
Accelerating algorithms, Reconfigurable Computing, Static Dataflow Graph, Modules C to VHDL
Pages: - WSEAS Transactions on Computers, ISSN / E-ISSN: 1109-2750 / 2224-2872, Volume 11, 2012DOI: *As the DOI is a unique identifier, it is already available in the pdf version.
**The DOI link will be activated in the first midst of January 2026.
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